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sm802112 clockworks ? 3-output, 480mhz/80mhz, ultra-low jitter lvds/cmos frequency synthesizer clockworks is a trademark of micrel, inc rotarywave is a registered trademark of multigig, inc. micrel inc. ? 2180 fortune drive ? san jose, ca 95131 ? usa ? tel +1 ( 408 ) 944-0800 ? fax + 1 (408) 474-1000 ? http://www.micrel.com general description the sm802112 is a member of the clockworks ? family of devices from micrel and provides extremely low-noise clock signals. it is based upon a unique patented rotarywave ? architecture that provides very-low phase noise. the device operates from a 3.3v or 2.5v power supply and synthesizes two lvds out put clocks, one at 480mhz and one at 80mhz and one lvcmos clock at 80mhz. the sm802112 accepts an 80mhz lvcmos reference clock or an 80mhz 1vp-p sine wave. data sheets and support documentation can be found on micrel?s web site at: www.micrel.com . features ? generates two lvds clock outputs, one at 480mhz and one at 80mhz ? generates one lvcmos clock output at 80mhz ? 2.5v or 3.3v operating range ? typical phase jitter @ 480mhz (12khz to 20mhz): 290fs ? industrial temperature range (?40 c to +85 c) ? green, rohs, and pfos compliant ? available in 44-pin 7mm 7mm qfn package applications ? set top box block diagram september 2011 m9999-091411-a hbwhelp@micrel.com or (408) 955-1690
micrel, inc. sm802112 september 2011 2 m9999-091411-a hbwhelp@micrel.com ordering information (1) part number marking shipping temperature range package SM802112UMG 802112 tray ?40c to +85 c 44-pin qfn SM802112UMGtr 802112 tape and reel ?40c to +85 c 44-pin qfn note: 1. devices are green, rohs, and pfos compliant. pin configuration 44-pin qfn (top view) pin description pin number pin name pin type pin leve l pin function 28, 29 /q0, q0 o, (dif) lvds differential clock output from bank 1, 480mhz. 4, 5 /q1, q1 o, (dif) lvds differential clock output from bank 2, 80mhz. 42, 41 /q2, q2 o, (dif) lvcmos differential clock output from bank 2, 80mhz. 12, 13 vdd pwr power supply. 31, 37, 38 vddo1 pwr power supply for output q0. 16, 43, 44 vddo2 pwr power supply for outputs q1, q2. 10, 21, 23 vss (exposed pad) pwr core power supply ground. the exposed pad must be connected to the vss ground plane. 24, 39 vsso1 pwr power supply ground for outputs q0. 3, 6, 40 vsso2 pwr power supply ground for outputs q1, q2. or (408) 955-1690
micrel, inc. sm802112 september 2011 3 m9999-091411-a hbwhelp@micrel.com or (408) 955-1690 pin description (continued) pin number pin name pin type pin leve l pin function 17 ref_in i, se lvcmos reference clock input, 80mhz. 9, 11, 14, 20, 27, 30, 30 test factory test pins. do not connect anything to these pins. 1, 2, 7, 8, 15, 18, 19, 22, 25, 26, 32, 33, 35, 36 nc no connect. do not connect anything to these pins.
micrel, inc. sm802112 september 2011 4 m9999-091411-a hbwhelp@micrel.com or (408) 955-1690 absolute maximum ratings (1) supply voltage (v dd , v ddo1/2 ) ......................................+4.6v input voltage (v in ) .............................. ? 0.50v to v dd + 0.5v lead temperature (soldering, 20s )............................ 260c case temper ature ..................................................... 115c storage temperature (t s ) ......................... ? 65 c to + 150c operating ratings (2) supply voltage (v dd , v ddo1/2 )............ +2.375v to +3.465v ambient temperature (t a ) .......................?40c to +85c junction thermal resistance (3) qfn ( ja ) still-air ......................................................24c/w qfn ( jb ) junction-to-board ......................................8c/w dc electrical characteristics (4) v dd = v ddo1/2 = 3.3v 5% or 2.5v 5% v dd = 3.3v 5%, v ddo1/2 = 3.3v 5% or 2.5v 5% t a = ? 40c to + 85c. symbol parameter condition min. typ. max. units v dd , v ddo1/2 2.5v operating voltage 2.375 2.5 2.625 v v dd , v ddo1/2 3.3v operating voltage 3.135 3.3 3.465 v i dd supply current v dd + v ddo outputs open 125 158 ma lvds dc electrical characteristics (4) v dd = v ddo1/2 = 3.3v 5% or 2.5v 5% v dd = 3.3v 5%, v ddo1/2 = 3.3v 5% or 2.5v 5% t a = ? 40c to + 85c. r l = 100 ? across q and /q. symbol parameter condition min. typ. max. units v od differential output voltage figures 1, 4 275 350 475 mv v od v od magnitude change 40 mv v os offset voltage 1.15 1.25 1.50 v v os v os magnitude change 50 mv notes: 1. permanent device damage may occur if absolute maximum ratings are exceeded. this is a stress rating only and functional oper ation is not implied at conditions other than those detailed in the operational sections of this data shee t. exposure to absolute maximum rating con ditions for extended periods may affect device reliability. 2. the data sheet limits are not guaranteed if t he device is operated beyond the operating ratings. 3. package thermal resistance assumes exposed pad is soldered (o r equivalent) to the devices most negative potential on the pcb . 4. the circuit is designed to meet the ac and dc specifications shown in the above table(s) after thermal equilibrium has been established.
micrel, inc. sm802112 september 2011 5 m9999-091411-a hbwhelp@micrel.com or (408) 955-1690 lvcmos output dc elect rical characteristics (4) v dd = v ddo1/2 = 3.3v 5% or 2.5v 5% v dd = 3.3v 5%, v ddo1/2 = 3.3v 5% or 2.5v 5% t a = ? 40c to + 85c. r l = 50 ? to v ddo /2. symbol parameter condition min. typ. max. units v oh output high voltage figure 5 v dd0 ? 0.7 v v ol output low voltage figure 5 0.6 v ref_in dc electrical characteristics (4) v dd = 3.3v 5%, or 2.5v 5%, t a = ? 40c to + 85c. symbol parameter condition min. typ. max. units v ih input high voltage 1.1 v dd + 0.3 v v il input low voltage ? 0.3 0.6 v i in input current v in = 0v to v dd ? 5 5 a
micrel, inc. sm802112 september 2011 6 m9999-091411-a hbwhelp@micrel.com or (408) 955-1690 ac electrical characteristics (4, 5) v dd = v ddo1/2 = 3.3v 5% or 2.5v 5% v dd = 3.3v 5%, v ddo1/2 = 3.3v 5% or 2.5v 5% t a = ? 40c to + 85c. symbol parameter condition min. typ. max. units q0 output 480 f out output frequency q1, q2 outputs 80 mhz f ref reference input frequency 80 mhz lvds output rise/fall time 20% ? 80% 100 250 400 t r /t f lcmos output rise/fall time 20% ? 80% 100 250 500 ps lvds outputs 48 50 52 odc output duty cycle lvcmos output 45 50 55 % t skew output-to-output skew q1 to q2, note 6 60 150 ps t lock pll lock time 20 ms t jit (? ) rms phase jitter (7) 480mhz lvds integration range (1khz ? 100mhz) 80mhz lvds, lvcmos integration range (1khz ? 20mhz) 300 290 600 600 fs phase noise input phase noise 80mhz input frequency offset frequency: 1khz 10khz 100khz 1mhz ? 124 ? 135 ? 143 ? 145 dbc output phase noise 480mhz output frequency offset frequency: 1khz 10khz 100khz 1mhz 10mhz 20mhz 100mhz ? 105 ? 115 ? 120 ? 120 ? 150 ? 154 ? 160 dbc phase noise spurious noise components 80mhz for q0 480mhz ? 58 -48 dbc notes: 5. all phase noise measurements were taken with an agilent 5052b phase noise system. 6. defined as skew between outputs at the same supply voltage and temperature. measured as the difference of the output differ ential crossing point of q1 and /q1 80mhz lvds, and the 50% point of lvcmos q2. lvcmos q2 and /q2 are both ac coupled into 50 ohms. 7. ref_in driven with a low-noise source, clockworks sm802001 progr ammed for an 80mhz cmos output. if using an external referen ce input, use a low phase noise source. with an external reference, the phas e noise will follow the input source phase noise up to about 1mhz . measured with input noise of 1khz -126dbc, 10khz -136dbc, 100khz -143dbc, 1mhz -146dbc.
micrel, inc. sm802112 september 2011 7 m9999-091411-a hbwhelp@micrel.com or (408) 955-1690 application information ref_in input for a 1v p? p sine wave signal applied to ref_in with the part operating at 3.3v, ac couple ref_in with a 50 termination of 206 to v dd and 66 to ground, close to the input. this provides 50 thevenin termination and a dc voltage of 0.8v. lvds outputs lvds outputs are to be terminated with 100 ? across q and /q. for best performance load all outputs. you can dc or ac-couple the outputs. lvcmos outputs lvcmos output q2 and /q2 are 80mhz complimentary outputs to reduce switching noise. terminate both outputs with identical loads to minimize noise.
micrel, inc. sm802112 september 2011 8 m9999-091411-a hbwhelp@micrel.com phase noise plots phase noise plot: 480mhz lvds phase noise plot: 80mhz lvds or (408) 955-1690
micrel, inc. sm802112 september 2011 9 m9999-091411-a hbwhelp@micrel.com phase noise plots (continued) phase noise plot: 80mhz lvcmos or (408) 955-1690
micrel, inc. sm802112 september 2011 10 m9999-091411-a hbwhelp@micrel.com figure 1. duty cycle timing figure 2. all outputs rise/fall time figure 3. rms phase/noise jitter or (408) 955-1690
micrel, inc. sm802112 september 2011 11 m9999-091411-a hbwhelp@micrel.com figure 4. lvds output load and test circuit figure 5. lvcmos output test load lvds and lvcmos output load and test circuit or (408) 955-1690
micrel, inc. sm802112 september 2011 12 m9999-091411-a hbwhelp@micrel.com package information 44-pin qfn micrel, inc. 2180 fortune drive san jose, ca 95131 usa tel +1 (408) 944-0800 fax +1 (408) 474-1000 web http://www.micrel.com micrel makes no representations or warranties with respect to t he accuracy or completeness of the information furnished in this data sheet. this information is not intended as a warranty and micrel does not assume responsibility for it s use. micrel reserves the right to change circuitry, specifications and descriptions at any time without notice. no license, whether expre ss, implied, arising by estoppel or other wise, to any intellectual property rights is granted by this document. except as provided in micrel?s terms and conditions of sale for such products, mi crel assumes no liability whatsoever, and micrel disclaims any express or implied warranty relating to the sale and/or use of micrel products including l iability or warranties relating to fitness for a particular purpose, merchantability, or infringement of an y patent, copyright or other intellectual p roperty right. micrel products are not designed or authori zed for use as components in life support app liances, devices or systems where malfu nction of a product reasonably be expected to result in pers onal injury. life support devices or system s are devices or systems that (a) are in tended for surgical impla into the body or (b) support or sustain life, and whose failure to perform can be reasonably expected to result in a significan t injury to the user. a purchaser?s use or sale of micrel produc ts for use in life support app liances, devices or systems is a purchaser?s own risk and purchaser agrees to fully indemnify micrel for any damages resulting from such use or sale. can nt ? 2011 micrel, incorporated. or (408) 955-1690

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